Substrate noise coupling

The second source of noise coupling is over the substrate. Because the substrate offers a relatively high impedance to ground, noise generated in one section of the circuit can be propagated through the substrate to other parts of the chip. This noise can then be capacitively coupled into the active part of an analog circuit. High impedance nodes as well as input nodes are particularly sensitive to capacitive coupling.

  
Figure 6.7: Using well as shield.

The capacitive coupling into circuit elements (resistors and capacitors) and sensitive signal lines, can be reduced with the use of shielding layers. To provide the maximum possible decoupling, the shielding layer should have the lowest possible impedance to a quiet power supply.

The most commonly used shielding is to place a well under capacitors and resistors. Figure 6.7 shows the implementation of a resistor and a capacitor using a well as shielding layer. The well below the resistor and capacitor serve to attenuate the noise coupling from the substrate to poly-silicon or metal layer.

Sensitive analog lines should be connected, whenever possible, in aluminium. This permits the use of a poly-silicon layer below the metal line as a shielding layer. The poly-silicon having a lower impedance than the well, provides a better attenuation of capacitively coupled noise.

The prudent use of well and substrate contacts helps to keep the active silicon free from noise in the analog sections of the circuit. Careful consideration should be used to determine where and when to use such contacts. For very sensitive applications, the use of dual V_SS lines internal to the cells is generally recommended[O'L91]. One V_SS line is used to supply the cell with current, and a second line is used to connect the substrate. The two supplies are then led to separate pads, which helps to prevent noise on the digital supply lines from entering the substrate.