| [1] |
Ulrik Dan Hansen.
Deploy and benchmark speech enhancement deep learning models on
Embedded systems.
B.Eng. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 2023.
Cooperation with GN Audio. |
| [2] |
Simon Winther Rasmussen.
Posit accelerator for a RISC-V processor.
B.Sc. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 2023. |
| [3] |
Otto Westy Rasmussen.
Low-latency network-on-chip.
B.Sc. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 2023. |
| [4] |
Andreas Alkjær Eriksen.
Low-latency network-on-chip.
B.Sc. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 2023. |
| [5] |
Simon Borup Lindegren.
Design and FPGA-implementation of a best-effort network-on-chip.
B.Sc. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 2021. |
| [6] |
William Wulff.
Design of configuration block for the FELIX readout system.
B.Eng. Thesis, 2021.
Formal collaboration with CERN, Switzerland. |
| [7] |
Andreas Gamborg.
FPGA-design and implementation of RISC-V processor.
Bachelor's Thesis, 2019. |
| [8] |
Hans Jakob Damsgaard.
Implementation and Optimization of a RISC-V Processor on a FPGA.
Bachelor's Thesis, 2019. |
| [9] |
Simon Thye Andersen and Anthon Vincent Riber.
Hardware accelerator for image processing using FPGA.
Bachelor's Thesis, 2018. |
| [10] |
Nicolai Wejs Hansen and Jacob Hebsgaard Jessen.
Network-on-Chip in FPGA.
Bachelor's Thesis, 2018. |
| [11] |
Mathias Linkis.
Power and performance implications of using variable length NOC
packets in a multicore audio.
Bachelor's Thesis. Collaboration with Oticon A/S., 2018. |
| [12] |
Andreas Toftegaard Kristensen.
High level synthesis and dynamic partial reconfiguration of FPGAs
for accelerating software tasks in real-time systems.
Bachelor's Thesis, 2017. |
| [13] |
Jon Emil Granberg.
Lens Rectification and Distortion Correction in FPGAs using High
Level Synthesis.
Bachelor's Thesis (formal collaboration with Autoliv AB, Sweden),
2017. |
| [14] |
Maja Lund.
Hit-in-hardware miss-in-software cache memory.
Bachelor's Thesis, 2016. |
| [15] |
Mathias Eide Eriksen.
Program debug controller for a digital signal processor used in
hearing aids.
Bachelor's Thesis (Formal collaboration with GN ReSound A/S), 2014. |
| [16] |
Dennis True.
A digital processor for use in a class-D audio amplifier.
Bachelor's Thesis (Formal collaboration with Merus Audio ApS.),
2014. |
| [17] |
Peter Skau-Jakobsen.
Production test of FPGA dominated systems.
Bachelor's Thesis (Formal collaboration with Axcon ApS.), 2013. |
| [18] |
R. B. Sørensen and J. Højgaard.
PCIe to Parallel Interface bridge in low-cost FPGA.
Bachelor's Thesis, IMM-B.Sc-2010-33 (Formal collaboration with
Vitesse Semiconductor Corporation Denmark), 2010. |
| [19] |
K. M. Andersen and M. A. A. Al-Nakeeb.
.
Bachelor's Thesis, IMM-B.Eng-2010-31 (Formal collaboration with
Prevas A/S), 2010. |
| [20] |
T.N. Jeppe.
In field hearing aid datalogger.
Bachelor's Thesis, IMM-B.Eng-2010-xx (Formal collaboration with
Oticon Inc.), 2010. |
| [21] |
M. Møller.
Et alternativ til RTOS på en FPGA.
Bachelor's Thesis, IMM-B.Eng-2008-46 (Formal collaboration with Data
Respons A/S, 2008. |
| [22] |
M. Stein.
Billedbehandling i FPGA - Stregkodeaflæsning.
Bachelor's Thesis, IMM-B.Eng-2007-44, 2007. |
| [23] |
L. F. Pedersen.
Mesh network sniffer.
Bachelor's Thesis, IMM-B.Eng-2007-35, 2007. |
| [24] |
J. B. Jensen and J. R. Nielsen.
Compiling from Haste to CDFG: a front end for an asynchronous
circuit synthesis system.
Bachelor's Thesis, IMM-B.Sc-2007-08, 2007. |
| [25] |
N. D. Tørring.
Multiprocessor in a FPGA.
Bachelor's Thesis, IMM-B.Sc-2007-10, 2007. |
| [26] |
Mikkel Aaslet.
RTL Design of an ALU extension to a RISC-V processor.
B.Eng. Thesis, Department of Applied Mathematics and Computer
Science, Technical University of Denmark, 202.
Cooperation with SyoSil. |
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