The previous analysis assumed that the transistors of the differential pair, M1 and M2 in Figure 5.1, are identical. In practice, this is rarely the case. In this section, the consequences of minor differences between the transistors are analysed in terms of the equivalent input offset voltage, VOS. VOS is defined as the input voltage, which must be applied in order to maintain the balance at the outputs.
In the analysis, we assume that the threshold voltages of the transistors
differ by the amount 
, and that the current factors differ by
:
Assuming, that the drain currents of the transistors are identical
(maintained by an external feedback loop), Equation (3.2)
yields the offset voltage, VOS, as the difference between the
gate-source voltages of the transistors:
Assuming that is small compared to 
, insertion
of the effective gate voltage, 
, yields
The difference between the threshold voltages is an explicit part
of the expression, and the contribution can only be minimised by
the use of layout techniques, e.g. common centroid. The relative
difference between the values of the current gain factors, ,
is multiplied by VGS-VT. Thus, selecting a `small' effective
gate voltage, VGS-VT, will also minimise this contribution.